1. Field of the Invention
The present invention relates to a probe card used for testing semiconductor devices (called LSIs below).
2. Description of Related Art
FIG. 5 is a schematic diagram showing a configuration of a conventional semiconductor test system and a test method of an LSI using the test system. In this figure, the reference numeral 1 designates a tester, 2 designates the main body of the tester, 3 designates a test head provided in the tester 1, 4 designates an interface board 4, 5 designates a connecting ring 5, 6 designates a probe card, 7 designates probe needles attached to the probe card 6, 8 designates signal lines connecting the main body 2 of the tester with the test head 3, 9 designates POGO pins connecting the test head 3 with the interface board 4, 10 designates POGO pins connecting the interface board 4 with the connecting ring 5, and 11 designates POGO pins connecting the connecting ring 5 with the probe card 6. The reference numeral 12 designates a wafer placed on a chuck top not shown, 13 designates an LSI formed in the wafer 12, and 14 designates bonding pads formed on the LSI 13. Incidentally, although FIG. 5 shows only two probe needles 7 for the simplicity of the drawing, many probe needles are attached on the probe card 6 in practice.
The test head 3 generates test signals, and compares response signals from the LSI 13 with expected values. The main body 2 of the tester adjusts the timings of the test signals, determines the patterns of the test signals, stores the expected values, and functions as a power supply.
The conventional semiconductor test system with such an arrangement applies the test signals generated by the test head 3 to the LSI 13 through the interface board 4, connecting ring 5 and probe card 6, with the tips of the probe needles 7 contacting the bonding pads 14. The response signals from the LSI 13, on the other hand, are applied to the test head 3 through the probe needles 7, probe card 6 and connecting ring 5.
FIG. 6 is a schematic view of a conventional probe card, which schematically illustrates a cross-section passing through the center line of the probe card and perpendicular to a surface of the probe card substrate. FIG. 7 is an enlarged perspective view illustrating the A region enclosed by broken lines in FIG. 6. In these figures, the reference numeral 15 designates a probe card substrate, 16 designates a resin for fixing the probe needles 7 on the probe card substrate 15, 17 designates electrode lands disposed on the probe card substrate 15, and 18 designates an opening in the center of the probe card substrate 15. Although the electrode lands 17 are depicted only on the side of the probe card substrate 15 to which the probe needles 7 are attached in FIG. 6, they are actually attached on the opposite side of the probe card substrate 15. The electrode lands 17 attached on the side to which the probe needles 7 are attached and the electrode lands on the opposite side are connected through wires provided in the probe card substrate 15 but not shown in this figure.
The plurality of probe needles 7 of the conventional probe card 6, which are thus fixed on the probe card substrate 15 using the resin 16, have a multilayer structure in order to prevent adjacent probe needles 7 from being short-circuited. FIGS. 6 and 7 illustrate the probe needles 7 arranged in a four multilayer structure. In FIG. 7, the reference symbol 7a designates a first layer probe needle, 7b designates a second layer probe needle, 7c designates a third layer probe needle and 7d designates a fourth layer probe needle. Each probe needle is worked out in a tapered shape in such a manner that its thickness gradually reduces towards its tip, and is bent near the tip such that the tip substantially perpendicularly contacts the bonding pads 14 formed on the LSI 13. In addition, each probe needles 7 is fixed to the electrode lands 17 at its supporting end.
FIG. 8 is a schematic diagram showing the layout of the probe needles in a section taken along the line 8--8 in FIG. 6. In this figure, the reference character X designates the thickness of the probe needles 7, Y designates the gap between the adjacent probe needles 7 in the same layer, and Z designates the pitch of the bonding pads 14. The gap Y between the adjacent probe needles 7 in the same layer must be set at least about 100 .mu.m when the probe card 6 is fabricated in the state of the art method in which the probe needles 7 are disposed manually.
In the conventional probe card 6 with such a arrangement, when the pitch Z of the bonding pads 14 is 50 .mu.m, and the probe needles 7 have the four multilayer structure, the pitch between the probe needles 7 in the same layer becomes 4Z=200 .mu.m. If the gap Y between the adjacent probe needles 7 in the same layer is set 100 .mu.m in this case, the thickness of the probe needles 7 becomes 4Z-Y=100 .mu.m. The probe needles 7 with a thickness X of 100 .mu.m, however, cannot achieve needle pressure strong enough to break impurities such as aluminum oxide covering the surface of the bonding pads 14, even if an overdrive is applied in order to bring the tips of the probe needles 7 into contact with the bonding pads 14. This may cause a contact failure between the probe needles 7 and bonding pads 14, resulting in the failure of applying the test signals to the LSI 13. This presents a problem of misjudging a non-defective LSI device as defective, thereby reducing the yield. Such a problem arises not only with the conventional probe card 6 in which the probe needles 7 are arranged in the four multilayer structure, but also with the conventional multilayer probe card in which the thickness X of the probe needles must be set thin.